ST7093

Ver 2.1

2003/09/23

F

N

System Interface

This chip has all two kinds of parallel interface type with MPU : 4-bit bus and 8-bit bus. 4-bit bus or 8-bit bus is

selected by IF pin.

During read or write operation, two 8-bit registers are used. One is data register (DR), the other is instruction

register(IR).

The data register(DR) is used as temporary data storage place for being written into or read from

DDRAM/CGRAM, target RAM is selected by RAM address setting instruction. Each internal operation, reading

from or writing into RAM, is done automatically. So to speak, after MPU reads DR data, the data in the next

DDRAM/CGRAM address is transferred into DR automatically. Also after MPU writes data to DR, the data in DR is

transferred into DDRAM/CGRAM automatically.

The Instruction register(IR) is used only to store instruction code transferred from MPU. MPU cannot use it to read

instruction data.

To select register, use RS input pin in 4-bit/8-bit bus mode and serial mode.

Table 1. Various kinds of operations according to RS and R/W bits for 68 interface.

RS

RW_WR Operation

L

L

Instruction Write operation (MPU writes Instruction code

into IR)

L

H

Read address counter (DB0 ~ DB6)

H

L

Data Write operation (MPU writes data into DR)

H

H

Data Read operation (MPU reads data from DR)

Table 1.1. Various kinds of operations according to RS and R/W bits for 80 interface.

RS

RW_WR E_RD

Operation

L

L

H

Instruction Write operation (MPU writes Instruction

code into IR)

L

H

L

Read address counter (DB0 ~ DB6)

H

L

H

Data Write operation (MPU writes data into DR)

H

H

L

Data Read operation (MPU reads data from DR)

Address Counter (AC)

Address Counter(AC) stores DDRAM/CGRAM address, transferred from IR.

After writing into (reading from) DDRAM/CGRAM, AC is automatically increased (decreased) by 1.

When RS = "Low" and R/W = "High", AC can be read through DB0 ~ DB6 ports.

DB0-DB7

RW_WR

RS

E_RD

Dummy

read

Instr

Circuit

ite

RAM

read

Timing Diagram of 8-bit Parallel Bus Mode Data Transfer (68 Series MPU Mode)