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AS1746 데이터시트(PDF) 10 Page - ams AG |
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AS1746 데이터시트(HTML) 10 Page - ams AG |
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10 / 15 page ![]() www.austriamicrosystems.com Revision 1.03 10 - 15 AS1746 Datasheet - A p p l i c a t i o n I n f o r m a t i o n Test Circuits and Timing Diagrams Figure 17. Switching Time Figure 18. Break-Before-Make Interval Figure 19. Charge Injection AS1746 COMx RLOAD 50 Ω VOUT INx V+ Switch Output Logic Input VIL 0 VOUT VIH tON tOFF tR < 5ns tF < 5ns 50% 50% 0.9 x VOUT NOx or NCx VIN CLOAD † 35pF † Includes stray capacitance and fixture capacitance. 0.9 x VOUT Logic input waveforms inverted for switches that have the opposite logic sense. GND Logic Input VOUT = VNx RLOAD RLOAD + RON () AS1746 COMx VOUT INx V+ NCx VIN NOx † Includes stray capacitance and fixture capacitance. Logic Input 0 VOUT VIH tD 50% 0.9 x VOUT GND Logic Input RLOAD 50 Ω CLOAD † 35pF NOx or NCx CLOAD VOUT RGEN VOUT INx ΔVOUT INx depends on switch configuration; input polarity is determined by the sense of the switches. V+ VIL to VIH INx INx Off Off Off Off On On VGEN GND AS1746 COMx Q = ΔVOUT x CLOAD |
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