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AS8500 데이터시트(PDF) 1 Page - ams AG

부품명 AS8500
상세설명  Universal multi pupose data aquisition system
PDF  41 Pages
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제조업체  AMSCO [ams AG]
홈페이지  http://www.ams.com
Logo AMSCO - ams AG

AS8500 데이터시트(HTML) 1 Page - ams AG

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DATA SHEET
Revision 1.2, 08-Junel-06
www.austriamicrosystems.com
Page 1 of 41
1
Features
16 bits resolution
differential inputs
Single + 5V supply
Low power 15 mW
SOIC16 package
16 kHz maximum sampling frequency
internal temperature measurement
internal reference
programmable current sources
digital comparator
active wake-up
PGA gains 6, 24, 50, 100
Zero offset
Zero offset TC
Extremely low noise
Internal oscillator with comparator for active wake up
3-wire serial interface,
!P compatible
temperature range – 40 to + 125 °C
2
Applications
battery management for automotive systems
power management
mV/µV-meter
thermocouple temperature measurement
RTD precision temperature measurement
high-precision voltage and current measurement
3
General description
The AS8500 is a complete, low power data acquisition system
for very small signals (i.e. voltages from shunt resistors,
thermocouples) that operates on a single 5 V power supply. The
chip powers up with a set of default conditions at which time it
can be operated as a read-only-converter. Reprogramming is at
any time possible by just writing into two internal registers via
the serial interface.
The AS8500 has four ground refering inputs which can be
switched separately to the internal PGA. Two input channels can
also be operated as a fully differential ground free input. The
system can measure both positive and negative input signals.
The PGA amplification ranges from 6 to 100 which enables the
system to measure signals from 7mV to 120 mV full scale range
with high accuracy, linearity and speed.
The chip contains a high precision bandgap reference and an
active offset compensation that makes the system offset free
(better than 0,5
!V) and the offset-TC value negligible. The built-
in programmable digital filter allows an effective noise
suppression if the high speed is not necessary in the application.
The input noise density is only 35 nV / Hz and due to
the high internal chopping frequency the system is free of 1/f-noise down
to DC.The 0-10 Hz noise is typical below 1 µV i.e. as good or better than
any other available chopper amplifier.
For high speed synchronous measurements the chip can run in an
automatic switching mode between two input channels with pre-
programmed parameter sets.
The circuit has been optimised for the application in battery management
systems in automotive systems. As a front end data acquisition system it
allows an high quality measurement of current, voltage and temperature
of the battery.
With a high quality 100
!" resistor the system can handle the starter
current of up to 1500 A, a continuous current of
# 300 A as well as the
very low idle current of a few mA in the standby mode.
For external temperature measurement the chip can use a wide variety of
different temperature sensors such as RTD, PTC, NTC, thermocouples or
even diodes or transistors. A built-in programmable current source can be
switched to any input and activate these sensors without the need of
other external components.
The measurement of the chip temperature with the integrated internal
temperature sensor allows in addition the temperature compensation of
sensitive parameters which increases the total accuracy considerably.
The flexibility of the system is further increased by a digital comparator
that can be assigned to any measured property
(current, voltage, temperature) and an active wake-up in the sleep-mode.
All analog input-terminals can be checked for wire break via the SDI-
interface.
INTERNAL TEMPERATURE
INPUT MUX
CHOPPER
PROTECTION
CURRENT
SOURCES
ETR
ETS
RSHH
RSHL
VBAT
16 BIT - CONVERTER
BUF
SERIAL INTERFACE / CONTROL REGISTERS
DSP
CONTROLLER
FILTER
INT. CLOCK
TIMER
CALIBRATION
DATA
COMPARATOR
1.26 V
REFERENCE
SCLK
SDAT
INTN
REF
AGND
VDDA
VSSA
VDDD
VSSD
CLK
EZPRG
PGA
and
LEVEL SHIFT
AS8500
Data Sheet
Universal multi pupose data aquisition system
Figure 1: Functional Block Diagram


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