SE97BTP datasheet(8/53 Pages) NXP

8 / 53 page

SE97B_1

Product data sheet

Rev. 01 — 27 January 2010

8 of 53

NXP Semiconductors

SE97B

DDR memory module temp sensor with integrated SPD

[1]

Between Tamb ≥ Tth(crit) and Tamb < Tth(crit) − Thys the EVENT output is in Comparator mode and bit 0 of CONFIG (EVENT output mode)

is ignored.

Refer to Table 4 for figure note information.

Fig 4.

EVENT output condition

002aae763

time

temperature (

°C)

critical

EVENT in Interrupt mode

EVENT in Comparator mode

software interrupt clear

Lower Boundary Alarm

Upper Boundary Alarm

EVENT in ‘Critical Temp only’ mode

(1)

(2)

(1) (3)

(4)

(3)(5)

(7)

(6) (4)

(2)

Tamb

Ttrip(l) − Thys

Ttrip(u) − Thys

Tth(crit) − Thys

Ttrip(u) − Thys

Ttrip(l) − Thys

Table 4.

EVENT output condition

Figure

note

EVENT output boundary

conditions

EVENT output

Temperature Register Status bits

Comparator

mode

Interrupt

mode

Critical Temp

only mode

Bit 15

Above

Critical

Trip

Bit 14

Above

Alarm

Window

Bit 13

Below

Alarm

Window

(1)

Tamb ≥ Ttrip(l)

HLH

(2)

Tamb < Ttrip(l) − Thys

(3)

Tamb > Ttrip(u)

(4)

Tamb ≤ Ttrip(u) − Thys

HLH

(5)

Tamb ≥ Tth(crit)

(6)

Tamb < Tth(crit) − Thys

(7)

Table note [1]

SE97BTP 데이터시트(PDF) 8 Page - NXP Semiconductors

SE97BTP 데이터시트(HTML) 8 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53

데이터시트 다운로드

링크 URL