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WM2626CD 데이터시트(PDF) 5 Page - Wolfson Microelectronics plc |
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WM2626CD 데이터시트(HTML) 5 Page - Wolfson Microelectronics plc |
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5 / 11 page ![]() Production Data WM2626 WOLFSON MICROELECTRONICS LTD PD Rev 1.0 April 2001 5 SERIAL INTERFACE NCS SCLK DIN 12 34 5 15 16 D0 D1 D12 D13 D14 D15 t WL t WH t SUD t HD t SUCSCK t SUC16CS Figure 1 Timing Diagram Test Conditions: RL = 10k Ω, CL = 100pF. VDD = 5V ± 10%, V REF = 2.048V and VDD = 3V ± 10%, V REF = 1.024V over recommended operating free-air temperature range (unless noted otherwise). SYMBOL TEST CONDITIONS MIN TYP MAX UNIT tSUCSCK Setup time, NCS low before first falling SCLK edge 10 ns tSUC16CS Setup time, 16 th falling SCLK edge (when data bit D0 is sampled) before NCS rising edge. 10 ns tWH Pulse duration, SCLK high. 25 ns tWL Pulse duration, SCLK low. 25 ns tSUD Setup time, data ready before SCLK falling edge. 10 ns tHD Hold time, data held valid after SCLK falling edge. 5ns |
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