WM8722

Advanced Information

WOLFSON MICROELECTRONICS LTD

AI Rev 1.5 May 2000

20

MXINR

MXINL

LINEOUTL

VAROUTL

VAROUTR

LINEOUTR

+

+

+

+

0/-6dB

0/-6dB

0/-6dB

L Mix Switches (0-9)

0/-6dB

R Mix Switches (0-9)

TONE

DAC

LEFT

DAC

RIGHT

DAC

Figure 9. Output Mixer Configuration

M6DB

In each of the 4 MUX control registers there is an M6DB bit relevant to that channel. Setting M6DB

high reduces the relevant output signal by 6dB.

BOTH

When a write to any MXSEL register is made with the BOTH bit set high, then the complementary

channel MXSEL register for the other channel is updated with the same value. For example, if

RVMXSEL is updated and BOTH is set, then LVMXSEL is updated with the same value, but the

RMXSEL and LMXSEL registers (the non variable output path muxes) are NOT updated.

REGISTER 12

TONE DURATION

Bits 0-7 of register 12 sets the duration of the tone burst. Writing to the register with a non-zero value

starts the tone burst. Wring zero to this register stops the tone.

T = (2.7x10

TCLK

REGISTER 13

TONE GENERATOR GAIN CONTROL

Bits 0-4 of register 13 TVOL[0:4] set the gain level of the tones summed into the analogue outputs.

Bit 5 of this word controls muting of the tones. Note both mute must be off (0) and the tone input to

the relevant mixer summing path must be selected (1). The gain defaults to 0dB (11111) but may be

attenuated n 1.5dB steps down to –46.5dB.

TONE GENERATOR WAVEFORM CONTROL

TFIN

A control bit (TFIN) is provided which allows selection of the method of completion of the burst. If set

to 1, the burst completes at the next zero crossing. If left at 0, the burst completes a whole number

of sinusoids, avoiding potential problems with DC levels changing across AC coupling capacitors. At

the conclusion of a tone burst, the circuit ensures that at the end of the duration time of the last tone,

the tone continues to the next zero crossing point to ensure DC offsets are not created.