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AM1808AZCED3 데이터시트(PDF) 112 Page - Texas Instruments

부품명 AM1808AZCED3
상세설명  AM1808 ARM Microprocessor
PDF  264 Pages
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제조업체  TI [Texas Instruments]
홈페이지  http://www.ti.com
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AM1808AZCED3 데이터시트(HTML) 112 Page - Texas Instruments

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A1
A1
X
Y
OFFSET
RecommendedDDR2/mDDR
DeviceOrientation
Y
Y
OFFSET
DDR2/mDDR
Device
AM1808
SPRS653A – FEBRUARY 2010 – REVISED APRIL 2010
www.ti.com
6.11.3.4 Placement
Figure 6-17 shows the required placement for the device as well as the DDR2/mDDR devices. The
dimensions for Figure 6-18 are defined in Table 6-28. The placement does not restrict the side of the PCB
that the devices are mounted on. The ultimate purpose of the placement is to limit the maximum trace
lengths and allow for proper routing space. For single-memory DDR2/mDDR systems, the second
DDR2/mDDR device is omitted from the placement.
Figure 6-18. Device and DDR2/mDDR Device Placement
Table 6-28. Placement Specifications
No.
Parameter
Min
Max
Unit
Notes
1
X
1750
Mils
See Notes (1), (2)
2
Y
1280
Mils
See Notes (1), (2)
3
Y Offset
650
Mils
See Notes (1). (2), (3)
4
Clearance from non-DDR2/mDDR signal to DDR2/mDDR Keepout Region
4
w (4) See Note (5)
(1)
See Figure 6-18 for dimension definitions.
(2)
Measurements from center of device to center of DDR2/mDDR device.
(3)
For single memory systems it is recommended that Y Offset be as small as possible.
(4)
w = PCB trace width as defined in Table 6-27 .
(5)
Non-DDR2/mDDR signals allowed within DDR2/mDDR keepout region provided they are separated from DDR2/mDDR routing layers by
a ground plane.
112
Peripheral Information and Electrical Specifications
Copyright © 2010, Texas Instruments Incorporated
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Product Folder Link(s): AM1808



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