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AM1808AZCED3 데이터시트(PDF) 115 Page - Texas Instruments |
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AM1808AZCED3 데이터시트(HTML) 115 Page - Texas Instruments |
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115 / 264 page ![]() AM1808 www.ti.com SPRS653A – FEBRUARY 2010 – REVISED APRIL 2010 6.11.3.8 Net Classes Table 6-31 lists the clock net classes for the DDR2/mDDR interface. Table 6-32 lists the signal net classes, and associated clock net classes, for the signals in the DDR2/mDDR interface. These net classes are used for the termination and routing rules that follow. Table 6-31. Clock Net Class Definitions Clock Net Class Pin Names CK DDR_CLKP / DDR_CLKN DQS0 DDR_DQS[0] DQS1 DDR_DQS[1] Table 6-32. Signal Net Class Definitions Associated Clock Net Clock Net Class Class Pin Names ADDR_CTRL CK DDR_BA[2:0], DDR_A[13:0], DDR_CS, DDR_CAS, DDR_RAS, DDR_WE, DDR_CKE D0 DQS0 DDR_D[7:0], DDR_DQM0 D1 DQS1 DDR_D[15:8], DDR_DQM1 DQGATE CK, DQS0, DQS1 DDR_DQGATE0, DDR_DQGATE1 6.11.3.9 DDR2/mDDR Signal Termination No terminations of any kind are required in order to meet signal integrity and overshoot requirements. Serial terminators are permitted, if desired, to reduce EMI risk; however, serial terminations are the only type permitted. Table 6-33 shows the specifications for the series terminators. Table 6-33. DDR2/mDDR Signal Terminations No. Parameter Min Typ Max Unit Notes 1 CK Net Class 0 10 Ω See Note (1) 2 ADDR_CTRL Net Class 0 22 Zo Ω See Notes (1), (2), (3) 3 Data Byte Net Classes (DQS[0], DQS[1], D0, D1) 0 22 Zo Ω See Notes (1), (2), (3), (4) 4 DQGATE Net Class (DQGATE) 0 10 Zo Ω See Notes (1), (2), (3) (1) Only series termination is permitted, parallel or SST specifically disallowed. (2) Terminator values larger than typical only recommended to address EMI issues. (3) Termination value should be uniform across net class. (4) When no termination is used on data lines (0 Ω), the DDR2/mDDR devices must be programmed to operate in 60% strength mode. Copyright © 2010, Texas Instruments Incorporated Peripheral Information and Electrical Specifications 115 Submit Documentation Feedback Product Folder Link(s): AM1808 |
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