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74LVC2G53GD 데이터시트(PDF) 15 Page - NXP Semiconductors |
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74LVC2G53GD 데이터시트(HTML) 15 Page - NXP Semiconductors |
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15 / 23 page ![]() 74LVC2G53_5 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 05 — 18 June 2008 15 of 23 NXP Semiconductors 74LVC2G53 2-channel analog multiplexer/demultiplexer Adjust fi voltage to obtain 0 dBm level at input. Fig 21. Test circuit for measuring isolation (OFF-state) dB 001aad396 50 Ω RL 0.1 µF S Z E Y0 Y1 VCC 0.5VCC 0.5VCC GND CL RL switch switch 1 1 2 2 VIL VIH S VIH VIH E fi VIL or VIH VIH a. Test circuit b. Input and output pulse definitions Qinj = ∆VO × CL. ∆V O = output voltage variation. Rgen = generator resistance. Vgen = generator voltage. Fig 22. Test circuit for measuring charge injection 001aad398 S Z Y0 Y1 RL CL VCC GND Rgen Vgen switch 1 2 VI VO E VIL G 001aac478 ∆VO off on off logic input VO (S) |
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