CS49300 datasheet(79/90 Pages) CIRRUS

79 / 90 page

CS49300 Family DSP

DS339F7

Multichannel (2 channel)

20-bit Left Justified

(SCLK must be at least 128Fs

for this mode)

(Configuration of AUDATA3 as S/PDIF

(IEC60958) or Digital Audio in the

format of I2S or Left Justified is

covered in AN162 and AN163)

0x80027F

0xFC7FFF

0x80017F

0x018000

0x80027C

0xF01F00

0x80017C

0x001300

Multichannel (4 channel)

20-bit Left Justified

(SCLK must be at least 128Fs

for this mode)

(Configuration of AUDATA3 as S/PDIF

(IEC60958) or Digital Audio in the

format of I2S or Left Justified is

covered in AN162 and AN163)

0x80027F

0xFC7FFF

0x80017F

0x010000

0x80027C

0xF01F00

0x80017C

0x001300

Multichannel (6 channel)

24-bit Left Justified

(SCLK must be at least 256Fs

for this mode)

(Configuration of AUDATA3 as S/PDIF

(IEC60958) or Digital Audio in the

format of I2S or Left Justified is

covered in AN162 and AN163)

0x80027F

0xFC7FFF

0x80027C

0xF01F00

0x80027D

0xF01F00

0x80027E

0xF01F00

Multichannel (2 channel)

24-bit Left Justified

(SCLK must be at least 128Fs

for this mode)

(Configuration of AUDATA3 as S/PDIF

(IEC60958) or Digital Audio in the

format of I2S or Left Justified is

covered in AN162 and AN163)

0x80027F

0xFC7FFF

0x80027C

0xF01F00

0x80017F

0x018000

Multichannel (4 channel)

24-bit Left Justified

(SCLK must be at least 128Fs

for this mode)

(Configuration of AUDATA3 as S/PDIF

(IEC60958) or Digital Audio in the

format of I2S or Left Justified is

covered in AN162 and AN163)

0x80027F

0xFC7FFF

0x80017F

0x010000

0x80027C

0xF01F00

B Value

DAO Data Format Of

AUDATA0, 1, 2 (or AUDATA0

for Multichannel Modes)

Hex

Message

Table 23. Output Data Format Configuration

(Parameter B) (Continued)

C Value

MCLK Frequency

Hex

Message

(default)

256Fs

0x80027F

0xFFE7FF

512Fs

0x80027F

0xFFE7FF

0x80017F

0x001000

128Fs

0x80027F

0xFFE7FF

0x80017F

0x001800

384Fs

(SCLK must be 64Fs in this

mode and MCLK must be an

input)

0x80027F

0xFFE7FF

0x80017F

0x000800

Table 24. Output MCLK Configuration

(Parameter C)

D Value

SCLK Frequency

Hex

Message

(default)

64Fs

0x80027F

0xFFF8FF

0x80017F

0x000100

128Fs

0x80027F

0xFFF8FF

0x80017F

0x000200

256Fs

0x80027F

0xFFF8FF

0x80017F

0x000300

Table 25. Output SCLK Configuration

(Parameter D)

E Value

SCLK Polarity

Hex

Message

(default)

Data Valid on Rising Edge

(clocked out on falling)

0x80027F

0xF7FFFF

Data Valid on Falling Edge

(clocked out on rising)

0x80017F

0x080000

Table 26. Output SCLK Polarity Configuration

(Parameter E)

CS49300 데이터시트(PDF) 79 Page - Cirrus Logic

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