CS4294SLASHCS4298 datasheet(47/66 Pages) CIRRUS

47 / 66 page

CS4202

DS549PP2

PR Bit

ADCs

DACs

Mixer

Analog

Reference

Link

Internal

Clock Off

Headphone

PR0

•

PR1

•

PR2

•••

•

PR3

•••

•

PR4

•

PR5

••

•

PR6

•

Table 16. Powerdown PR Function Matrix for the CS4202

Power State

IDVdd (mA)

[DVdd=3.3 V]

IDVdd (mA)

[DVdd=5 V]

IAVdd1 (mA)

IAVdd2 (mA)

Full Power + SRC’s

25.2

40.2

31.3

5.1

Full Power + S/PDIF1

30.0

46.6

31.3

5.1

Full Power + HP2

26.4

41.5

32.1

39.5

Full Power

26.4

41.5

31.3

5.1

ADCs off (PR0)

24.0

37.9

23.2

4.9

DACs off (PR1)

24.3

38.4

25.8

5.0

Audio off (PR2)

21.9

34.9

3.8

0 µA

Vref off (PR3)

21.9

34.9

1.5

0 µA

AC-Link off (PR4)

21.8

35.3

31.2

5.1

Internal Clocks off (PR5)

3.8

6.3

19.0

4.6

HP amp off (PR6)

26.3

41.5

29.8

0 µA

Digital off (PR4+PR5)

10 µA

21 µA

19.0

4.6

All off (PR3+PR4+PR5)

10 µA

21 µA

1.3

0 µA

RESET

0.8

1.4

3.6

0 µA

Table 17. Power Consumption by Powerdown Mode for the CS4202

1 Assuming standard resistive load for transformer coupled coaxial S/PDIF output (Rload = 292 Ohm, DVdd

= 3.3 V) (Rload = 415 Ohm, DVdd = 5 V). General: IDVdd S/PDIF = IDVdd + DVdd/Rload/2

2 HP_OUT_L, HP_OUT_R driving 4 Vpp into 32 Ohm resistive load.

CS4294/CS4298 데이터시트(PDF) 47 Page - Cirrus Logic

CS4294/CS4298 데이터시트(HTML) 47 Page - Cirrus Logic

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66

데이터시트 다운로드

링크 URL