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ADS5400IPZP 데이터시트(PDF) 17 Page - Texas Instruments

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부품명 ADS5400IPZP
상세설명  12-Bit, 1-GSPS Analog-to-Digital Converter
PDF  48 Pages
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제조업체  TI [Texas Instruments]
홈페이지  http://www.ti.com
Logo TI - Texas Instruments

ADS5400IPZP 데이터시트(HTML) 17 Page - Texas Instruments

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InstructionCycle
DataTransferCycle(s)
SDENB
SCLK
SDIO
SDENB
SCLK
SDIO
r/w
N1
N0
A4
A3
A2
A1
A0
D7
D6
D5
D4
D3
D2
D1
D0
t (SDENB)
S
tSCLK
t (SDIO)
S
t (SDIO)
h
tSCLKH
tSCLKL
SDENB
SCLK
SDIO
SDO
SDENB
SCLK
SDIO
SDO
InstructionCycle
DataTransferCycle(s)
r/w
N1
N0
-
A3
A2
A1
A0
D7
D6
D5
D4
D3
D2
D1
D0
0
D7
D6
D5
D4
D3
D2
D1
D0
0
3pinConfigurationOutput
4pinConfigurationOutput
Datan
Datan-1
t (Data)
d
ADS5400
www.ti.com
SLAS611B – OCT 2009 – REVISED MARCH 2010
Figure 6. Serial Interface Write Timing Diagram
Figure 7 shows the serial interface timing diagram for a ADS5400 read operation. SCLK is the serial interface
clock input to ADS5400. Serial data enable SDENB is an active low input to ADS5400. SDIO is serial data in
during the instruction cycle. In 3 pin configuration, SDIO is data out from ADS5400 during the data transfer
cycle(s), while SDO is in a high-impedance state. In 4 pin configuration, SDO is data out from ADS5400 during
the data transfer cycle(s). At the end of the data transfer, SDO will output low on the final falling edge of SCLK
until the rising edge of SDENB when it will 3-state.
Figure 7. Serial Interface Read Timing Diagram
Copyright © 2009–2010, Texas Instruments Incorporated
17
Product Folder Link(s): ADS5400



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