PCA9541ADSLASH01 datasheet(15/41 Pages) NXP

15 / 41 page

PCA9541A_3

Product data sheet

Rev. 03 — 16 July 2009

15 of 41

NXP Semiconductors

PCA9541A

2-to-1 I2C-bus master selector with interrupt logic and reset

8.4 Interrupt Status registers

The PCA9541A provides 4 different types of interrupt:

• To indicate to the former I2C-bus master that it is not in control of the bus anymore

• To indicate to the new I2C-bus master that:

– The bus recovery/initialization has been performed and that the downstream

channel connection has been done (built-in bus recovery/initialization active).

– A ‘bus not well initialized’ condition has been detected by the PCA9541A when the

switch has been done (built-in bus recovery/initialization not active). This

information can be used by the new master to initiate its own bus

recovery/initialization sequence.

• Indicate to both I2C-bus upstream masters that a downstream interrupt has been

generated through the INT_IN pin.

• Functionality wiring test.

8.4.1 Bus control lost interrupt

When an upstream master takes control of the I2C-bus while the other channel was using

the downstream channel, an interrupt is generated to the master losing control of the bus

(INT line goes LOW to let the master know that it lost the control of the bus) immediately

after disconnection from the downstream channel.

By setting the BUSLOSTMSK bit to ‘1’, the interrupt is masked and the upstream master

that lost the I2C-bus control does not receive an interrupt (INT line does not go LOW).

8.4.2 Recovery/initialization interrupt

Before switching to a new upstream channel, an automatic bus recovery/initialization can

be performed by the PCA9541A. This function is requested by setting the BUSINIT bit to

‘1’. When the downstream bus has been initialized, an interrupt to the new master is

generated (INT line goes LOW).

By setting the BUSINITMSK bit to ‘1’, the interrupt is masked and the new master does

not receive an interrupt (INT line does not go LOW).

When the automatic bus recovery/initialization is not requested, if the built-in bus sensor

function (sensing permanently the downstream I2C-bus trafﬁc) detects a non-idle

condition (previous bus channel connected to the downstream slave channel, was

between a START and STOP condition), then an interrupt to the new master is sent (INT

line goes LOW). This interrupt tells the new master that an external bus

recovery/initialization must be performed. By setting the BUSOKMSK bit to ‘1’, the

interrupt is masked and the new master does not receive an interrupt (INT line does not

go LOW).

Remark: In this particular situation, after the switch to the new master is performed,

a read of the Interrupt Status Register is not possible if the switch happened in the

middle of a read sequence because the new master does not have control of the SDA

line.

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