PIC16F526-ISLASHP datasheet(43/122 Pages) MICROCHIP

43 / 122 page

 2010 Microchip Technology Inc.

DS41326D-page 43

PIC16F526

8.0

SPECIAL FEATURES OF THE

CPU

What sets a microcontroller apart from other

processors are special circuits that deal with the needs

real-time

applications.

The

PIC16F526

microcontrollers have a host of such features intended

to maximize system reliability, minimize cost through

elimination of external components, provide power-

saving operating modes and offer code protection.

These features are:

• Oscillator Selection

• Reset:

- Power-on Reset (POR)

- Device Reset Timer (DRT)

- Wake-up from Sleep on Pin Change

• Watchdog Timer (WDT)

• Sleep

• Code Protection

• ID Locations

• In-Circuit Serial Programming™

•Clock Out

The PIC16F526 device has a Watchdog Timer, which

can be shut off only through Configuration bit WDTE. It

runs off of its own RC oscillator for added reliability. If

using HS, XT or LP selectable oscillator options, there

is always an 18 ms (nominal) delay provided by the

Device Reset Timer (DRT), intended to keep the chip in

Reset until the crystal oscillator is stable. If using

INTRC or EXTRC, there is a 1 ms delay only on VDD

power-up. With this timer on-chip, most applications

need no external Reset circuitry.

The Sleep mode is designed to offer a very low current

Power-Down mode. The user can wake-up from Sleep

through a change on input pins or through a Watchdog

Timer time-out. Several oscillator options are also

made available to allow the part to fit the application,

including an internal 4/8 MHz oscillator. The EXTRC

oscillator option saves system cost while the LP crystal

option saves power. A set of Configuration bits are

used to select various options.

8.1

Configuration Bits

The PIC16F526 Configuration Words consist of 12 bits.

Configuration bits can be programmed to select various

device configurations. Three bits are for the selection of

the oscillator type; one bit is the Watchdog Timer

enable bit, one bit is the MCLR enable bit and one bit is

for code protection (Register 8-1).

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