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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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PIC16F690-E/ML 데이터시트(PDF) 69 Page - Microchip Technology |
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PIC16F690-E/ML 데이터시트(HTML) 69 Page - Microchip Technology |
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69 / 306 page  © 2008 Microchip Technology Inc. DS41262E-page 67 PIC16F631/677/685/687/689/690 4.2.5.6 RA5/T1CKI/OSC1/CLKIN Figure 4-6 shows the diagram for this pin. The RA5/T1CKI/OSC1/CLKIN pin is configurable to function as one of the following: • a general purpose I/O • a Timer1 clock input • a crystal/resonator connection • a clock input FIGURE 4-6: BLOCK DIAGRAM OF RA5 I/O Pin VDD VSS D Q CK Q D Q CK Q D Q CK Q D Q CK Q VDD D EN Q D EN Q Weak Data Bus WR WPUA RD WPUA RD PORTA WR PORTA WR TRISA RD TRISA WR IOCA RD IOCA To TMR1 or CLKGEN INTOSC Mode RD PORTA INTOSC Mode RABPU OSC2 (2) Note 1: Timer1 LP Oscillator enabled. 2: When using Timer1 with LP oscillator, the Schmitt Trigger is bypassed. TMR1LPEN(1) Interrupt-on- Change Oscillator Circuit Q3 |
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