MPC8308CVMADDA datasheet(6/88 Pages) FREESCALE

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MPC8308 PowerQUICC II Pro Processor Hardware Specification, Rev. 1

Freescale Semiconductor

Power Characteristics

The I/O power supply ramp-up slew rate should be slower than 4V/100

μs; this requirement is for ESD

circuit.

Note that there is no specific power-down sequence requirement for the device. I/O voltage supplies

(GVDD, LVDD, and NVDD) do not have any ordering requirements with respect to one another.

Figure 3. Power-Up Sequencing Example

Power Characteristics

The estimated typical power dissipation, not including I/O supply power for the device is shown in Table 4.

Table 5 shows the estimated typical I/O power dissipation.

Table 4. MPC8308 Power Dissipation1

1 The values do not include I/O supply power but do include core (AV

DD) and PLL (AVDD1,

AVDD2, XCOREVDD, XPADVDD, SDAVDD)

Core Frequency (MHz)

CSB Frequency (MHz)

Typical2

2 Typical power is based on best process, a voltage of V

DD = 1.0V and ambient temperature

of TA = 25° C

Maximum3

3 Maximum power is estimated based on best process, a voltage of V

DD = 1.05 V and

ambient temperature of TJ = 105° C

Unit

266

133

530

900

333

133

565

950

400

133

600

1000

Note

90%

Core Voltage (VDD)

I/O Voltage (GVDD, LVDD, and NVDD)

0.7 V

PORESET

>= 32

× tSYS_CLK_IN

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