STA015T datasheet(24/56 Pages) STMICROELECTRONICS

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HEAD_M[15:8]

HEAD_L[7:0]

Address: 0x43, 0x44, 0x45 (67, 68, 69)

Type: RO

Software Reset: 0x00

Hardware Reset: 0x00

Head[1:0] emphasis

Head[2] original/copy

Head[3] copyrightHead

[5:4] mode extension

Head[7:6] mode

Head[8] private bit

Head[9] padding bit

Head[11:10] sampling frequency index

Head[15:12] bitrate index

Head[16] protection bit

Head[18:17] layer

Head[19] ID

Head[20] ID_ex

The HEAD registers can be viewed as logically concatenated to store the MPEG Layer III Header content.

The set of three registers is updated every time the synchronisation to the new MPEG frame is achieved

The meaning of the flags are shown in the following tables:

MPEG IDs

Layer

in Layer III these two flags must be set always to "01".

Protection_bit

It equals "1" if no redundancy has been added and "0" if redundancy has been added.

MSB

LSB

H15

H14

H13

H12

H11

H10

MSB

LSB

IDex

MPEG 2.5

reserved

MPEG 2

MPEG 1

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