PC912XDP512F0MPVR datasheet(464/1348 Pages) FREESCALE

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Chapter 10 Freescale’s Scalable Controller Area Network (S12MSCANV3)

MC9S12XDP512 Data Sheet, Rev. 2.21

464

Freescale Semiconductor

10.4.3.1

Protocol Violation Protection

The MSCAN protects the user from accidentally violating the CAN protocol through programming errors.

The protection logic implements the following features:

•

The receive and transmit error counters cannot be written or otherwise manipulated.

•

All registers which control the conﬁguration of the MSCAN cannot be modiﬁed while the MSCAN

is on-line. The MSCAN has to be in Initialization Mode. The corresponding INITRQ/INITAK

handshake bits in the CANCTL0/CANCTL1 registers (see Section 10.3.2.1, “MSCAN Control

— MSCAN control 1 register (CANCTL1)

— MSCAN bus timing registers 0 and 1 (CANBTR0, CANBTR1)

— MSCAN identiﬁer acceptance control register (CANIDAC)

— MSCAN identiﬁer acceptance registers (CANIDAR0–CANIDAR7)

— MSCAN identiﬁer mask registers (CANIDMR0–CANIDMR7)

•

The TXCAN pin is immediately forced to a recessive state when the MSCAN goes into the power

down mode or initialization mode (see Section 10.4.5.6, “MSCAN Power Down Mode,” and

Section 10.4.5.5, “MSCAN Initialization Mode”).

•

The MSCAN enable bit (CANE) is writable only once in normal system operation modes, which

provides further protection against inadvertently disabling the MSCAN.

10.4.3.2

Clock System

Figure 10-43 shows the structure of the MSCAN clock generation circuitry.

Figure 10-43. MSCAN Clocking Scheme

The clock source bit (CLKSRC) in the CANCTL1 register (10.3.2.2/10-426) deﬁnes whether the internal

CANCLK is connected to the output of a crystal oscillator (oscillator clock) or to the bus clock.

The clock source has to be chosen such that the tight oscillator tolerance requirements (up to 0.4%) of the

CAN protocol are met. Additionally, for high CAN bus rates (1 Mbps), a 45% to 55% duty cycle of the

clock is required.

Bus Clock

Oscillator Clock

MSCAN

CANCLK

CLKSRC

Prescaler

(1 .. 64)

Time quanta clock (Tq)

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