PC912XDP512F0MPVR datasheet(465/1348 Pages) FREESCALE

465 / 1348 page

Chapter 10 Freescale’s Scalable Controller Area Network (S12MSCANV3)

MC9S12XDP512 Data Sheet, Rev. 2.21

Freescale Semiconductor

465

If the bus clock is generated from a PLL, it is recommended to select the oscillator clock rather than the

bus clock due to jitter considerations, especially at the faster CAN bus rates.

For microcontrollers without a clock and reset generator (CRG), CANCLK is driven from the crystal

oscillator (oscillator clock).

A programmable prescaler generates the time quanta (Tq) clock from CANCLK. A time quantum is the

atomic unit of time handled by the MSCAN.

Eqn. 10-2

A bit time is subdivided into three segments as described in the Bosch CAN speciﬁcation. (see

Figure 10-44):

•

SYNC_SEG: This segment has a ﬁxed length of one time quantum. Signal edges are expected to

happen within this section.

•

Time Segment 1: This segment includes the PROP_SEG and the PHASE_SEG1 of the CAN

standard. It can be programmed by setting the parameter TSEG1 to consist of 4 to 16 time quanta.

•

Time Segment 2: This segment represents the PHASE_SEG2 of the CAN standard. It can be

programmed by setting the TSEG2 parameter to be 2 to 8 time quanta long.

Eqn. 10-3

Figure 10-44. Segments within the Bit Time

CANCLK

Prescaler value

(

)

------------------------------------------------------

Bit Rate

number of Time Quanta

()

---------------------------------------------------------------------------------

SYNC_SEG

Time Segment 1

Time Segment 2

4 ... 16

2 ... 8

8 ... 25 Time Quanta

= 1 Bit Time

NRZ Signal

Sample Point

(single or triple sampling)

(PROP_SEG + PHASE_SEG1)

(PHASE_SEG2)

Transmit Point

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