PC912XDP512F0MPVR datasheet(473/1348 Pages) FREESCALE

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Chapter 10 Freescale’s Scalable Controller Area Network (S12MSCANV3)

MC9S12XDP512 Data Sheet, Rev. 2.21

Freescale Semiconductor

473

NOTE

The dedicated interrupt vector addresses are deﬁned in the Resets and

Interrupts chapter.

10.4.7.2

Transmit Interrupt

At least one of the three transmit buffers is empty (not scheduled) and can be loaded to schedule a message

for transmission. The TXEx ﬂag of the empty message buffer is set.

10.4.7.3

Receive Interrupt

A message is successfully received and shifted into the foreground buffer (RxFG) of the receiver FIFO.

This interrupt is generated immediately after receiving the EOF symbol. The RXF ﬂag is set. If there are

multiple messages in the receiver FIFO, the RXF ﬂag is set as soon as the next message is shifted to the

foreground buffer.

10.4.7.4

Wake-Up Interrupt

A wake-up interrupt is generated if activity on the CAN bus occurs during MSCAN internal sleep mode.

WUPE (see Section 10.3.2.1, “MSCAN Control Register 0 (CANCTL0)”) must be enabled.

10.4.7.5

Error Interrupt

An error interrupt is generated if an overrun of the receiver FIFO, error, warning, or bus-off condition

occurrs. Section 10.3.2.5, “MSCAN Receiver Flag Register (CANRFLG) indicates one of the following

conditions:

•

Overrun — An overrun condition of the receiver FIFO as described in Section 10.4.2.3, “Receive

Structures,” occurred.

•

CAN Status Change — The actual value of the transmit and receive error counters control the

CAN bus state of the MSCAN. As soon as the error counters skip into a critical range

(Tx/Rx-warning, Tx/Rx-error, bus-off) the MSCAN ﬂags an error condition. The status change,

which caused the error condition, is indicated by the TSTAT and RSTAT ﬂags (see

Section 10.3.2.5, “MSCAN Receiver Flag Register (CANRFLG)” and Section 10.3.2.6, “MSCAN

Receiver Interrupt Enable Register (CANRIER)”).

10.4.7.6

Interrupt Acknowledge

Interrupts are directly associated with one or more status ﬂags in either the Section 10.3.2.5, “MSCAN

Receiver Flag Register (CANRFLG)” or the Section 10.3.2.7, “MSCAN Transmitter Flag Register

Table 10-37. Interrupt Vectors

Interrupt Source

CCR Mask

Local Enable

Wake-Up Interrupt (WUPIF)

I bit

CANRIER (WUPIE)

Error Interrupts Interrupt (CSCIF, OVRIF)

I bit

CANRIER (CSCIE, OVRIE)

Receive Interrupt (RXF)

I bit

CANRIER (RXFIE)

Transmit Interrupts (TXE[2:0])

I bit

CANTIER (TXEIE[2:0])

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