PC912XDP512F0MPVR datasheet(696/1348 Pages) FREESCALE

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Chapter 19 S12X Debug (S12XDBGV2) Module

MC9S12XDP512 Data Sheet, Rev. 2.21

698

Freescale Semiconductor

19.3.1.1

Debug Control Register 1 (DBGC1)

Read: Anytime

Write: Bits 7,1,0 anytime, Bit 6 can be written anytime but always reads back as 0.

Bits 5:2 anytime DBG is not armed.

NOTE

When disarming the DBG by clearing ARM with software, the contents of

bits[5:2] are not affected by the write, since up until the write operation,

ARM=1 preventing these bits from being written. These bits must be cleared

using a second write if required.

0x0029

DBGXAH

Bit 22

Bit 16

0x002A

DBGXAM

Bit 15

Bit 8

0x002B

DBGXAL

Bit 7

654321

Bit 0

0x002C

DBGXDH

Bit 15

Bit 8

0x002D

DBGXDL

Bit 7

654321

Bit 0

0x002E

DBGXDHM

Bit 15

Bit 8

0x002F

DBGXDLM

Bit 7

654321

Bit 0

0x0020

76543210

ARM

XGSBPE

BDM

DBGBRK

COMRV

TRIG

Reset

00000000

Figure 19-3. Debug Control Register (DBGC1)

Address

Name

Bit 7

654321

Bit 0

= Unimplemented or Reserved

Figure 19-2. DBG Register Summary (continued)

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