PC912XDP512F0MPVR datasheet(754/1348 Pages) FREESCALE

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Chapter 20 S12X Debug (S12XDBGV3) Module

MC9S12XDP512 Data Sheet, Rev. 2.21

756

Freescale Semiconductor

20.3.2.5

Debug Trace Buffer Register (DBGTBH:DBGTBL)

Read: Anytime when unlocked and not secured and not armed.

Write: Aligned word writes when disarmed unlock the trace buffer for reading but do not affect trace buffer

contents.

Address: 0x0024, 0x0025

76543210

Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10

Bit 9

Bit 8

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Reset

XXXX

Figure 20-7. Debug Trace Buffer Register (DBGTB)

Table 20-16. DBGTB Field Descriptions

Field

Description

15–0

Bit[15:0]

Trace Buffer Data Bits — The Trace Buffer Register is a window through which the 64-bit wide data lines of the

Trace Buffer may be read 16 bits at a time. Each valid read of DBGTB increments an internal trace buffer pointer

which points to the next address to be read. When the ARM bit is written to 1 the trace buffer is locked to prevent

reading. The trace buffer can only be unlocked for reading by writing to DBGTB with an aligned word write when

the module is disarmed. The DBGTB register can be read only as an aligned word, any byte reads or misaligned

access of these registers will return 0 and will not cause the trace buffer pointer to increment to the next trace

buffer address. The same is true for word reads while the debugger is armed. System resets do not affect the

trace buffer contents. The POR state is undeﬁned.

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