PC912XDP512F0MPVR datasheet(781/1348 Pages) FREESCALE

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Chapter 20 S12X Debug (S12XDBGV3) Module

MC9S12XDP512 Data Sheet, Rev. 2.21

Freescale Semiconductor

783

20.4.6.1

External Tagging using TAGHI and TAGLO

External tagging using the external TAGHI and TAGLO pins can only be used to tag S12XCPU opcodes;

tagging of XGATE code using these pins is not possible. An external tag triggers the state sequencer into

state0 when the tagged opcode reaches the execution stage of the instruction queue.

The pins operate independently, thus the state of one pin does not affect the function of the other. External

tagging is possible in emulation modes only. The presence of logic level 0 on either pin at the rising edge

of the external clock (ECLK) performs the function indicated in the Table 20-43. It is possible to tag both

bytes of an instruction word. If a taghit occurs, a breakpoint can be generated as deﬁned by the DBGBRK

and BDM bits in DBGC1. Each time TAGHI or TAGLO are low on the rising edge of ECLK, the old tag

is replaced by a new one.

20.4.6.2

Unconditional Tagging Function

In emulation modes a low assertion of PE5/TAGLO/MODA in the 7th or 8th bus cycle after reset enables

the unconditional tagging function, allowing immediate tagging via TAGHI/TAGLO with breakpoint to

BDM independent of the ARM, BDM and DBGBRK bits. Conversely these bits are not affected by

unconditional tagging. The unconditional tagging function remains enabled until the next reset. This

function allows an immediate entry to BDM in emulation modes before user code execution. The TAGLO

assertion must be in the 7th or 8th bus cycle following the end of reset, whereby the prior RESET pin

assertion lasts the full 192 bus cycles.

20.4.7

Breakpoints

There are several ways to generate breakpoints to the XGATE and S12XCPU modules

•

Through XGATE software breakpoint requests.

•

From comparator channel triggers to ﬁnal state.

•

Using software to write to the TRIG bit in the DBGC1 register.

•

From taghits generated using the external TAGHI and TAGLO pins.

•

Through the auxilliary forced breakpoint input.

20.4.7.1

XGATE Software Breakpoints

The XGATE software breakpoint instruction BRK can request an S12XCPU breakpoint, via the

S12XDBG module. In this case, if the XGSBPE bit is set, the S12XDBG module immediately generates

a forced breakpoint request to the S12XCPU, the state sequencer is returned to state0 and tracing, if active,

is terminated. If conﬁgured for BEGIN trigger and tracing has not yet been triggered from another source,

the trace buffer contains no information. Breakpoint requests from the XGATE module do not depend

Table 20-43. Tag Pin Function

TAGHI

TAGLO

Tag

No tag

Low byte

High byte

Both bytes

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