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PC912XDP512F0MPVR 데이터시트(PDF) 839 Page - Freescale Semiconductor, Inc

부품명 PC912XDP512F0MPVR
상세설명  HCS12X Microcontrollers
PDF  1348 Pages
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제조업체  FREESCALE [Freescale Semiconductor, Inc]
홈페이지  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

PC912XDP512F0MPVR 데이터시트(HTML) 839 Page - Freescale Semiconductor, Inc

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Chapter 22 DP512 Port Integration Module (S12XDP512PIMV2)
MC9S12XDP512 Data Sheet, Rev. 2.21
Freescale Semiconductor
841
22.3.2.19 Port T Data Direction Register (DDRT)
Read: Anytime.
Write: Anytime.
This register configures each port T pin as either input or output.
The ECT forces the I/O state to be an output for each timer port associated with an enabled output compare.
In this case the data direction bits will not change.
The DDRT bits revert to controlling the I/O direction of a pin when the associated timer output compare
is disabled.
The timer input capture always monitors the state of the pin.
76543210
R
DDRT7
DDRT6
DDRT5
DDRT4
DDRT3
DDRT2
DDRT1
DDRT0
W
Reset
00000000
Figure 22-21. Port T Data Direction Register (DDRT)
Table 22-23. DDRT Field Descriptions
Field
Description
7–0
DDRT[7:0]
Data Direction Port T
0 Associated pin is configured as input.
1 Associated pin is configured as output.
Note: Due to internal synchronization circuits, it can take up to 2 bus clock cycles until the correct value is read
on PTT or PTIT registers, when changing the DDRT register.



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