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PC912XDP512F0MPVR 데이터시트(PDF) 842 Page - Freescale Semiconductor, Inc |
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PC912XDP512F0MPVR 데이터시트(HTML) 842 Page - Freescale Semiconductor, Inc |
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842 / 1348 page ![]() Chapter 22 DP512 Port Integration Module (S12XDP512PIMV2) MC9S12XDP512 Data Sheet, Rev. 2.21 844 Freescale Semiconductor 22.3.2.24 Port S Input Register (PTIS) Read: Anytime. Write: Never, writes to this register have no effect. This register always reads back the buffered state of the associated pins. This also can be used to detect overload or short circuit conditions on output pins. 76543210 R PTIS7 PTIS6 PTIS5 PTIS4 PTIS3 PTIS2 PTIS1 PTIS0 W Reset1 1 These registers are reset to zero. Two bus clock cycles after reset release the register values are updated with the associated pin values. ———————— = Unimplemented or Reserved Figure 22-26. Port S Input Register (PTIS) |
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