PC912XDP512F0MPVR datasheet(845/1348 Pages) FREESCALE

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Chapter 22 DP512 Port Integration Module (S12XDP512PIMV2)

MC9S12XDP512 Data Sheet, Rev. 2.21

Freescale Semiconductor

847

22.3.2.28 Port S Polarity Select Register (PPSS)

Read: Anytime.

Write: Anytime.

This register selects whether a pull-down or a pull-up device is connected to the pin.

22.3.2.29 Port S Wired-OR Mode Register (WOMS)

Read: Anytime.

Write: Anytime.

This register configures the output pins as wired-OR. If enabled the output is driven active low only

(open-drain). A logic level of “1” is not driven. It applies also to the SPI and SCI outputs and allows a

multipoint connection of several serial modules. These bits have no influence on pins used as inputs.

76543210

PPSS7

PPSS6

PPSS5

PPSS4

PPSS3

PPSS2

PPSS1

PPSS0

Reset

00000000

Figure 22-30. Port S Polarity Select Register (PPSS)

Table 22-30. PPSS Field Descriptions

Field

Description

7–0

PPSS[7:0]

Pull Select Port S

0 A pull-up device is connected to the associated port S pin, if enabled by the associated bit in register PERS

and if the port is used as input or as wired-OR output.

1 A pull-down device is connected to the associated port S pin, if enabled by the associated bit in register PERS

and if the port is used as input.

76543210

WOMS7

WOMS6

WOMS5

WOMS4

WOMS3

WOMS2

WOMS1

WOMS0

Reset

00000000

Figure 22-31. Port S Wired-OR Mode Register (WOMS)

Table 22-31. WOMS Field Descriptions

Field

Description

7–0

WOMS[7:0]

Wired-OR Mode Port S

0 Output buffers operate as push-pull outputs.

1 Output buffers operate as open-drain outputs.

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