PC912XDP512F0MPVR datasheet(997/1348 Pages) FREESCALE

997 / 1348 page

24.0.5.10 IRQ Control Register (IRQCR)

Read: See individual bit descriptions below.

Write: See individual bit descriptions below.

24.0.5.11 Port K Data Register (PORTK)

Read: Anytime.

Write: Anytime.

Table 24-13. Free-Running ECLK Clock Rate

EDIV[1:0]

Rate of Free-Running ECLK

ECLK = Bus clock rate

ECLK = Bus clock rate divided by 2

ECLK = Bus clock rate divided by 3

ECLK = Bus clock rate divided by 4

76543210

IRQE

IRQEN

000000

Reset

01000000

= Unimplemented or Reserved

Figure 24-12. IRQ Control Register (IRQCR)

Table 24-14. IRQCR Field Descriptions

Field

Description

IRQE

IRQ Select Edge Sensitive Only

Special modes: Read or write anytime.

Normal and emulation modes: Read anytime, write once.

0 IRQ conﬁgured for low level recognition.

1 IRQ conﬁgured to respond only to falling edges. Falling edges on the IRQ pin will be detected anytime

IRQE = 1 and will be cleared only upon a reset or the servicing of the IRQ interrupt.

IRQEN

External IRQ Enable

Read or write anytime.

0 External IRQ pin is disconnected from interrupt logic.

1 External IRQ pin is connected to interrupt logic.

76543210

PK7

PK5

PK4

PK3

PK2

PK1

PK0

Reset

00000000

Figure 24-13. Port K Data Register (PORTK)

PC912XDP512F0MPVR 데이터시트(PDF) 997 Page - Freescale Semiconductor, Inc

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