PC912XDP512F0MPVR datasheet(1026/1348 Pages) FREESCALE

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Chapter 24 DG128 Port Integration Module (S12XDG128PIMV2)

MC9S12XDP512 Data Sheet, Rev. 2.21

1028

Freescale Semiconductor

24.0.5.65 Port AD1 Pull Up Enable Register 1 (PER1AD1)

Read: Anytime.

Write: Anytime.

This register activates a pull-up device on the respective PAD[7:0] pin if the port is used as input. This bit

has no effect if the port is used as output. Out of reset no pull-up device is enabled.

Functional Description

Each pin except PE0, PE1, and BKGD can act as general purpose I/O. In addition each pin can act as an

output from the external bus interface module or a peripheral module or an input to the external bus

interface module or a peripheral module.

A set of configuration registers is common to all ports with exceptions in the expanded bus interface and

ATD ports (Table 24-60). All registers can be written at any time; however a specific configuration might

not become active.

Example: Selecting a pull-up device

This device does not become active while the port is used as a push-pull output.

76543210

PER1AD17

PER1AD16

PER1AD15

PER1AD14

PER1AD13

PER1AD12

PER1AD11

PER1AD10

Reset

00000000

Figure 24-67. Port AD1 Pull Up Enable Register 1 (PER1AD1)

Table 24-59. PER1AD1 Field Descriptions

Field

Description

7–0

PER1AD1[7:0]

Pull Device Enable Port AD1 Register 1

0 Pull-up device is disabled.

1 Pull-up device is enabled.

Table 24-60. Register Availability per Port1

Port

Data

Direction

Input

Reduced

Drive

Pull

Enable

Polarity

Select

Wired-OR

Mode

Interrupt

Enable

Interrupt

Flag

yes

—

yes

—

yes

—

————

yes

—

————

yes

—

————

yes

—

yes

—

yes

—

yes

—

yes

—

yes

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