PC912XDP512F0MPVR datasheet(1043/1348 Pages) FREESCALE

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Chapter 25 2 Kbyte EEPROM Module (S12XEETX2KV1)

MC9S12XDP512 Data Sheet, Rev. 2.21

Freescale Semiconductor

1045

All bits read 0 and are not writable.

25.3.2.4

EEPROM Conﬁguration Register (ECNFG)

The ECNFG register enables the EEPROM interrupts.

CBEIE and CCIE bits are readable and writable while all remaining bits read 0 and are not writable.

76543210

00000000

Reset

00000000

= Unimplemented or Reserved

Figure 25-6. RESERVED2

76543210

CBEIE

CCIE

000000

Reset

00000000

= Unimplemented or Reserved

Figure 25-7. EEPROM Conﬁguration Register (ECNFG)

Table 25-3. ECNFG Field Descriptions

Field

Description

CBEIE

Command Buffer Empty Interrupt Enable — The CBEIE bit enables an interrupt in case of an empty command

buffer in the EEPROM module.

0 Command Buffer Empty interrupt disabled.

1 An interrupt will be requested whenever the CBEIF ﬂag (see Section 25.3.2.6, “EEPROM Status Register

(ESTAT)”) is set.

CCIE

Command Complete Interrupt Enable — The CCIE bit enables an interrupt in case all commands have been

completed in the EEPROM module.

0 Command Complete interrupt disabled.

1 An interrupt will be requested whenever the CCIF ﬂag (see Section 25.3.2.6, “EEPROM Status Register

(ESTAT)”) is set.

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