PC912XDP512F0MPVR datasheet(1115/1348 Pages) FREESCALE

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Chapter 27 512 Kbyte Flash Module (S12XFTX512K4V2)

MC9S12XDP512 Data Sheet, Rev. 2.21

Freescale Semiconductor

1117

CBEIE, CCIE and KEYACC bits are readable and writable while all remaining bits read 0 and are not

writable in normal mode. KEYACC is only writable if KEYEN (see Section 27.3.2.2, “Flash Security

mass erase and erase verify operations. When writing to the FCNFG register in special mode, all

unimplemented/ reserved bits must be written to 0.

76543210

CBEIE

CCIE

KEYACC

00000

Reset

00000000

= Unimplemented or Reserved

Figure 27-8. Flash Conﬁguration Register (FCNFG — Normal Mode)

76543210

CBEIE

CCIE

KEYACC

Undeﬁned

BKSEL

Reset

Undeﬁned

0000

= Unimplemented or Reserved

Figure 27-9. Flash Conﬁguration Register (FCNFG — Special Mode)

Table 27-9. FCNFG Field Descriptions

Field

Description

CBEIE

Command Buffer Empty Interrupt Enable — The CBEIE bit enables an interrupt in case of an empty command

buffer in the Flash module.

0 Command buffer empty interrupt disabled.

1 An interrupt will be requested whenever the CBEIF ﬂag (see Section 27.3.2.6, “Flash Status Register

(FSTAT)”) is set.

CCIE

Command Complete Interrupt Enable — The CCIE bit enables an interrupt in case all commands have been

completed in the Flash module.

0 Command complete interrupt disabled.

1 An interrupt will be requested whenever the CCIF ﬂag (see Section 27.3.2.6, “Flash Status Register (FSTAT)”)

is set.

KEYACC

Enable Security Key Writing

0 Flash writes are interpreted as the start of a command write sequence.

1 Writes to Flash array are interpreted as keys to open the backdoor. Reads of the Flash array return invalid

data.

1–0

BKSEL[1:0]

Block Select — The BKSEL[1:0] bits indicates which register bank is active according to Table 27-10.

Table 27-10. Flash Register Bank Selects

BKSEL[1:0]

Selected Block

Flash Block 0

Flash Block 1

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