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PC912XDP512F0MPVR 데이터시트(PDF) 1197 Page - Freescale Semiconductor, Inc

부품명 PC912XDP512F0MPVR
상세설명  HCS12X Microcontrollers
PDF  1348 Pages
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제조업체  FREESCALE [Freescale Semiconductor, Inc]
홈페이지  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

PC912XDP512F0MPVR 데이터시트(HTML) 1197 Page - Freescale Semiconductor, Inc

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Chapter 29 128 Kbyte Flash Module (S12XFTX128K1V1)
MC9S12XDP512 Data Sheet, Rev. 2.21
Freescale Semiconductor
1199
29.3.2.5
Flash Protection Register (FPROT)
The FPROT register defines which Flash sectors are protected against program or erase operations.
All bits in the FPROT register are readable and writable with restrictions (see Section 29.3.2.5.1, “Flash
Protection Restrictions”) except for RNV[6] which is only readable.
During the reset sequence, the FPROT register is loaded from the Flash Configuration Field at global
address 0x7F_FF0D. To change the Flash protection that will be loaded during the reset sequence, the
upper sector of the Flash memory must be unprotected, then the Flash Protect/Security byte located as
described in Table 29-1 must be reprogrammed.
Trying to alter data in any protected area in the Flash memory will result in a protection violation error and
the PVIOL flag will be set in the FSTAT register. The mass erase of a Flash block is not possible if any of
the Flash sectors contained in the Flash block are protected.
Table 29-8. FCNFG Field Descriptions
Field
Description
7
CBEIE
Command Buffer Empty Interrupt Enable — The CBEIE bit enables an interrupt in case of an empty command
buffer in the Flash module.
0 Command buffer empty interrupt disabled.
1 An interrupt will be requested whenever the CBEIF flag (see Section 29.3.2.6, “Flash Status Register
(FSTAT)”) is set.
6
CCIE
Command Complete Interrupt Enable — The CCIE bit enables an interrupt in case all commands have been
completed in the Flash module.
0 Command complete interrupt disabled.
1 An interrupt will be requested whenever the CCIF flag (see Section 29.3.2.6, “Flash Status Register (FSTAT)”)
is set.
5
KEYACC
Enable Security Key Writing
0 Flash writes are interpreted as the start of a command write sequence.
1 Writes to Flash array are interpreted as keys to open the backdoor. Reads of the Flash array return invalid
data.
76543210
R
FPOPEN
RNV6
FPHDIS
FPHS
FPLDIS
FPLS
W
Reset
F
F
F
FFFFF
= Unimplemented or Reserved
Figure 29-8. Flash Protection Register (FPROT)



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