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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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PC912XDP512F0MPVR 데이터시트(PDF) 120 Page - Freescale Semiconductor, Inc |
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PC912XDP512F0MPVR 데이터시트(HTML) 120 Page - Freescale Semiconductor, Inc |
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120 / 1348 page  Chapter 3 Pierce Oscillator (S12XOSCLCPV1) MC9S12XDP512 Data Sheet, Rev. 2.21 120 Freescale Semiconductor 3.1.3 Block Diagram Figure 3-1 shows a block diagram of the XOSC. Figure 3-1. XOSC Block Diagram 3.2 External Signal Description This section lists and describes the signals that connect off chip 3.2.1 VDDPLL and VSSPLL — Operating and Ground Voltage Pins Theses pins provides operating voltage (VDDPLL) and ground (VSSPLL) for the XOSC circuitry. This allows the supply voltage to the XOSC to be independently bypassed. 3.2.2 EXTAL and XTAL — Input and Output Pins These pins provide the interface for either a crystal or a CMOS compatible clock to control the internal clock generator circuitry. EXTAL is the external clock input or the input to the crystal oscillator amplifier. XTAL is the output of the crystal oscillator amplifier. The MCU internal system clock is derived from the EXTAL XTAL Gain Control VDDPLL = 2.5 V Rf OSCCLK Monitor_Failure Clock Monitor Peak Detector |
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