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PC912XDP512F0MPVR 데이터시트(PDF) 1248 Page - Freescale Semiconductor, Inc |
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PC912XDP512F0MPVR 데이터시트(HTML) 1248 Page - Freescale Semiconductor, Inc |
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1248 / 1348 page ![]() Appendix A Electrical Characteristics MC9S12XDP512 Data Sheet, Rev. 2.21 1250 Freescale Semiconductor Table A-9. shows the configuration of the peripherals for run current measurement. Table A-9. Peripheral Configurations for Run Supply Current Measurements Peripheral Configuration MSCAN configured to loop-back mode using a bit rate of 1Mbit/s SPI configured to master mode, continously transmit data (0x55 or 0xAA) at 1Mbit/s SCI configured into loop mode, continously transmit data (0x55) at speed of 57600 baud IIC operate in master mode and continously transmit data (0x55 or 0xAA) at the bit rate of 100Kbit/s PWM configured to toggle its pins at the rate of 40kHz ECT the peripheral shall be configured to output compare mode, Pulse accumulator and modulus counter enabled. ATD the peripheral is configured to operate at its maximum specified frequency and to continuously convert voltages on all input channels in sequence. XGATE XGATE fetches code from RAM, XGATE runs in an infinite loop , it reads the Status and Flag registers of CAN’s, SPI’s, SCI’s in sequence and does some bit manipulation on the data COP COP Warchdog Rate 224 RTI enabled, RTI Control Register (RTICTL) set to $FF API the module is configured to run from the RC oscillator clock source. PIT PIT is enabled, Micro-timer register 0 and 1 loaded with $0F and timer registers 0 to 3 are loaded with $03/07/0F/1F. DBG the module is enabled and the comparators are configured to trigger in outside range. The range covers all the code executed by the core. |
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