| 전자부품 데이터시트 검색엔진 |
|
PC912XDP512F0MPVR 데이터시트(PDF) 1252 Page - Freescale Semiconductor, Inc |
|
|
|||||||||||||||||||||||||||||
PC912XDP512F0MPVR 데이터시트(HTML) 1252 Page - Freescale Semiconductor, Inc |
|
1252 / 1348 page ![]() Appendix A Electrical Characteristics MC9S12XDP512 Data Sheet, Rev. 2.21 1254 Freescale Semiconductor Table A-13. ATD Operating Characteristics 3.3V A.2.2 Factors Influencing Accuracy Three factors — source resistance, source capacitance and current injection — have an influence on the accuracy of the ATD. A.2.2.1 Source Resistance Due to the input pin leakage current as specified in Table A-7 in conjunction with the source resistance there will be a voltage drop from the signal source to the ATD input. The maximum source resistance RS specifies results in an error of less than 1/2 LSB (2.5 mV) at the maximum leakage current. If device or operating conditions are less than worst case or leakage-induced error is acceptable, larger values of source resistance is allowed. A.2.2.2 Source Capacitance When sampling an additional internal capacitor is switched to the input. This can cause a voltage drop due to charge sharing with the external and the pin capacitance. For a maximum sampling error of the input voltage ≤ 1LSB, then the external filter capacitor, Cf ≥ 1024 * (CINS–CINN). Conditions are shown in Table A-4 unless otherwise noted, Supply Voltage 3.15V < VDDA < 3.6V Num C Rating Symbol Min Typ Max Unit 1 D Reference potential Low High VRL VRH VSSA VDDA/2 — — VDDA/2 VDDA V V 2 C Differential reference voltage1 1 Full accuracy is not guaranteed when differential voltage is less than 3.15 V VRH-VRL 3.15 3.3 3.6 V 3 D ATD clock frequency fATDCLK 0.5 — 2.0 MHz 4 D ATD 10-bit conversion period Clock cycles2 Conv, time at 2.0 MHz ATD clock fATDCLK 2 The minimum time assumes a final sample period of 2 ATD clocks cycles while the maximum time assumes a final sample period of 16 ATD clocks. NCONV10 TCONV10 14 7 — — 28 14 Cycles µs 5 D ATD 8-bit conversion period Clock cycles2 Conv, time at 2.0 MHz ATD clock fATDCLK NCONV8 TCONV8 12 6 — — 26 13 Cycles µs 6 D Recovery time (VDDA = 5.0 Volts) tREC —— 20 µs 7 P Reference supply current 2 ATD blocks on IREF — — 0.500 mA 8 P Reference supply current 1 ATD block on IREF — — 0.250 mA |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |