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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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PC912XDP512F0MPVR 데이터시트(PDF) 1292 Page - Freescale Semiconductor, Inc |
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PC912XDP512F0MPVR 데이터시트(HTML) 1292 Page - Freescale Semiconductor, Inc |
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1292 / 1348 page  Appendix C Recommended PCB Layout MC9S12XDP512 Data Sheet, Rev. 2.21 1294 Freescale Semiconductor Appendix C Recommended PCB Layout The PCB must be carefully laid out to ensure proper operation of the voltage regulator as well as of the MCU itself. The following rules must be observed: • Every supply pair must be decoupled by a ceramic capacitor connected as near as possible to the corresponding pins (C1–C6). • Central point of the ground star should be the VSSR pin. • Use low ohmic low inductance connections between VSS1, VSS2, and VSSR. •VSSPLL must be directly connected to VSSR. • Keep traces of VSSPLL, EXTAL, and XTAL as short as possible and occupied board area for C7, C8, and Q1 as small as possible. • Do not place other signals or supplies underneath area occupied by C7, C8, and Q1 and the connection area to the MCU. • Central power input should be fed in at the VDDA/VSSA pins. |
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