PLL FREQUENCY SYNTHESIZER FOR PAGER

S5T8809

11

PHASE DETECTOR / LOCK DETECTOR

Figure 5. Phase Detector / Lock Detector

Figure 6. Figure 5-2. Phase Detector / Lock Detector / Fast Lock Output Waveforms

NOTES:

1.

Phase detector always compares the Phase difference of N-counter with R-counter, and generates High or Low

State as much as the phase difference

2.

The LD output is set to Low level same as Phase detector error width

1/ 8

CNT

13 or 15 Bit

R- Divider

Phase

Detector

32/33

Counter

OSCI

OSCO

Fin

Fr

Fn

PDO

FL

FRC

1

2

16 or 18 Bit

N- Divider

Lock

Detector

LD

10

7

PBC

9

4

5

FLC

Fr

Fn

PDO

LD

FL

* Fast Lock Operation Window

Window width = OSCI x 4

VDD1

GND

Z-State

Z-State