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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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AT90PWM3 데이터시트(PDF) 149 Page - ATMEL Corporation |
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AT90PWM3 데이터시트(HTML) 149 Page - ATMEL Corporation |
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149 / 361 page  149 4317J–AVR–08/10 AT90PWM2/3/2B/3B 16.10 PSC Input Mode 2: Stop signal, Execute Opposite Dead-Time and Wait Figure 16-22. PSCn behaviour versus PSCn Input A in Fault Mode 2 PSC Input A is take into account during DT0 and OT0 only. It has no effect during DT1 and OT1. When PSCn Input A event occurs, PSC releases PSCOUTn0, jumps and executes DT1 plus OT1 and then waits for PSC Input A inactive state. Even if PSC Input A is released during DT1 or OT1, DT1 plus OT1 sub-cycle is always com- pletely executed. Figure 16-23. PSCn behaviour versus PSCn Input B in Fault Mode 2 PSC Input B is take into account during DT1 and OT1 only. It has no effect during DT0 and OT0. When PSC Input B event occurs, PSC releases PSCOUTn1, jumps and executes DT0 plus OT0 and then waits for PSC Input B inactive state. Even if PSC Input B is released during DT0 or OT0, DT0 plus OT0 sub-cycle is always com- pletely executed. PSCOUTn0 PSCOUTn1 PSC Input A PSC Input B DT0 OT0 DT1 OT1 DT0 OT0 DT1 OT1 DT0 OT0 DT1 OT1 PSCOUTn0 PSCOUTn1 PSC Input A PSC Input B DT0 OT0 DT1 OT1 DT0 OT0 DT1 OT1 DT0 OT0 DT1 OT1 |
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