AD9550

Rev. 0 | Page 5 of 20

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

CMOS MODE

Output Voltage High, V

OH

Output driver static

I

2.8

V

I

2.8

V

Output Voltage Low, V

OL

Output driver static

I

0.5

V

I

0.3

V

Frequency Range

0

200

MHz

3.3 V CMOS; output toggle rates in excess of the

maximum are possible, but with reduced amplitude

(see Figure 14)

Duty Cycle

45

55

%

At maximum output frequency

Rise/Fall Time1 (20% to 80%)

500

745

ps

3.3 V CMOS; 10 pF load

JITTER CHARACTERISTICS

Table 3.

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

JITTER GENERATION

Output

12 kHz to 20 MHz

LVPECL

1.31

ps rms

Input = 122.88 MHz, output = 155.52 MHz

1.28

ps rms

Input = 19.44 MHz, output = 245.76 MHz

0.89

ps rms

Input = 25 MHz, output = 125 MHz, Pin A3 to Pin A0 = 1110, Pin Y5

to Pin Y0 = 111111 (see Figure 3)

LVDS Output

1.32

ps rms

Input = 122.88 MHz, output = 155.52 MHz

1.29

ps rms

Input = 19.44 MHz, output = 245.76 MHz

CMOS Output

1.24

ps rms

Input = 122.88 MHz, output = 155.52 MHz

1.26

ps rms

Input = 19.44 MHz, output = 245.76 MHz, see Figure 14 regarding

CMOS toggle rates above 250 MHz

50 kHz to 80 MHz

Input = 122.88 MHz, output = 155.52 MHz

LVPECL

0.44

ps rms

Input = 122.88 MHz, output = 155.52 MHz

0.75

ps rms

Input = 19.44 MHz, output = 245.76 MHz

0.58

ps rms

Input = 25 MHz, output = 125 MHz, Pin A3 to Pin A0 = 1110, Pin Y5

to Pin Y0 = 111111 (see Figure 3)

LVDS

0.45

ps rms

Input = 122.88 MHz, output = 155.52 MHz

0.76

ps rms

Input = 19.44 MHz, output = 245.76 MHz

CMOS

0.39

ps rms

Input = 122.88 MHz, output = 155.52 MHz

0.44

ps rms

Input = 19.44 MHz, output = 245.76 MHz, see Figure 14 regarding

CMOS toggle rates above 250 MHz

JITTER TRANSFER BANDWIDTH

See the Typical Performance Characteristics section

Bandwidth Setting

Low

170

Hz

Medium

20

kHz

High

75

kHz

JITTER TRANSFER PEAKING

See the Typical Performance Characteristics section

Bandwidth Setting

Low

1.3

dB

Medium

0

dB

High

0.08

dB