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AT25DF641A 데이터시트(PDF) 4 Page - ATMEL Corporation

부품명 AT25DF641A
상세설명  64-Mbit 2.7V Minimum Serial Peripheral Interface Serial Flash Memory
PDF  57 Pages
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제조업체  ATMEL [ATMEL Corporation]
홈페이지  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

AT25DF641A 데이터시트(HTML) 4 Page - ATMEL Corporation

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4
8693A–DFLASH–8/10
Atmel AT25DF641A [Preliminary]
HOLD
HOLD: The HOLD pin is used to temporarily pause serial communication without
deselecting or resetting the device. While the HOLD pin is asserted, transitions on the SCK
pin and data on the SI pin will be ignored, and the SO pin will be in a high-impedance state.
The CS pin must be asserted, and the SCK pin must be in the low state in order for a Hold
condition to start. A Hold condition pauses serial communication only and does not have an
effect on internally self-timed operations such as a program or erase cycle. Please refer to
“Hold” on page 44 for additional details on the Hold operation.
The HOLD pin is internally pulled-high and may be left floating if the Hold function will not be
used. However, it is recommended that the HOLD pin also be externally connected to V
CC
whenever possible.
Low
Input
V
CC
DEVICE POWER SUPPLY: The V
CC pin is used to supply the source voltage to the device.
Operations at invalid V
CC voltages may produce spurious results and should not be
attempted.
-Power
GND
GROUND: The ground reference for the power supply. GND should be connected to the
system ground.
-Power
Figure 2-1.
8-SOIC (Top View)
Figure 2-2.
8-UDFN (Top View)
Table 2-1.
Pin Descriptions (Continued)
Symbol
Name and Function
Asserted
State
Type
1
2
3
4
8
7
6
5
CS
SO
WP
GND
VCC
HOLD
SCK
SI
CS
SO (SOI)
WP
GND
1
2
3
4
8
7
6
5
VCC
HOLD
SCK
SI (SIO)



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