전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

Preview PDF HTML

WM8711SEDS/R 데이터시트(PDF) 37 Page - Wolfson Microelectronics plc

부품명 WM8711SEDS/R
상세설명  Internet Audio DAC with Integrated Headphone Amplifier
PDF  47 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  WOLFSON [Wolfson Microelectronics plc]
홈페이지  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8711SEDS/R 데이터시트(HTML) 37 Page - Wolfson Microelectronics plc

Back Button WM8711SEDS/R Datasheet HTML 33Page - Wolfson Microelectronics plc WM8711SEDS/R Datasheet HTML 34Page - Wolfson Microelectronics plc WM8711SEDS/R Datasheet HTML 35Page - Wolfson Microelectronics plc WM8711SEDS/R Datasheet HTML 36Page - Wolfson Microelectronics plc WM8711SEDS/R Datasheet HTML 37Page - Wolfson Microelectronics plc WM8711SEDS/R Datasheet HTML 38Page - Wolfson Microelectronics plc WM8711SEDS/R Datasheet HTML 39Page - Wolfson Microelectronics plc WM8711SEDS/R Datasheet HTML 40Page - Wolfson Microelectronics plc WM8711SEDS/R Datasheet HTML 41Page - Wolfson Microelectronics plc Next Button
Zoom Inzoom in Zoom Outzoom out
 37 / 47 page
background image
Production Data
WM8711 / WM8711L
w
PD Rev 4.4 April 2007
37
REGISTER MAP
The complete register map is shown in Table 24. The detailed description can be found in the
relevant text of the device description. There are 8 registers with 9 bits per register. These can be
controlled using either the 2 wire or 3 wire MPU interface.
REGISTER
B
15
B
14
B
13
B
12
B
11
B
10
B
9
B8
B7
B6
B5
B4
B3
B2
B1
B0
R2 (04h)
0
0
0
0
0
1
0
LRHP
BOTH
LZCEN
LHPVOL
R3 (06h)
0
0
0
0
0
1
1
RLHP
BOTH
RZCEN
RHPVOL
R4 (08h)
0
0
0
0
1
0
0
0
0
0
0
DAC SEL BYPASS
0
0
0
R5 (0Ah)
0
0
0
0
1
0
1
0
0
0
0
0
DAC MU
DEEMPH
0
R6 (0Ch)
0
0
0
0
1
1
0
0
POWER
OFF
CLK
OUTPD
OSCPD
OUTPD
DACPD
1
1
1
R7 (0Eh)
0
0
0
0
1
1
1
0
BCLK
INV
MS
LR SWAP
LRP
IWL
FORMAT
R8 (10h)
0
0
0
1
0
0
0
0
CLK0
DIV2
CLKI
DIV2
SR
BOSR
USB/
NORM
R9 (12h)
0
0
0
1
0
0
1
0
0
0
0
0
0
0
0
ACTIVE
R15(1Eh)
0
0
0
1
1
1
1
RESET
ADDRESS
DATA
Table 23 Mapping of Program Registers
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
6:0
LHPVOL
[6:0]
1111001
( 0dB )
Left Channel Headphone Output
Volume Control
1111111 = +6dB
. . 1dB steps down to
0110000 = -73dB
0000000 to 0101111 = MUTE
7
LZCEN
0
Left Channel Zero Cross detect Enable
1 = Enable
0 = Disable
0000010
Left Headphone
Out
8
LRHPBOTH
0
Left to Right Channel Headphone
Volume, Mute and Zero Cross Data
Load Control
1 = Enable Simultaneous Load of
LHPVOL[6:0] and LZCEN to
RHPVOL[6:0] and RZCEN
0 = Disable Simultaneous Load



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com