LIS331DLFTR datasheet(27/38 Pages) STMICROELECTRONICS

27 / 38 page

LIS331DLF

Doc ID 15101 Rev 4

27/38

BOOT bit is used to refresh the content of internal registers stored in the flash memory

block. At the device power up the content of the flash memory block is transferred to the

internal registers related to trimming functions to permit a good behavior of the device itself.

If for any reason the content of trimming registers was changed it is sufficient to use this bit

to restore correct values. When BOOT bit is set to ‘1’ the content of internal flash is copied

inside corresponding internal registers and it is used to calibrate the device. These values

are factory trimmed and they are different for every accelerometer. They permit a good

behavior of the device and normally they have not to be changed. At the end of the boot

process the BOOT bit is set again to ‘0’.

HPCF[1:0]. These bits are used to configure high-pass filter cut-off frequency ft which is

given by:

The equation can be simplified to the following approximated equation:

HPen1

High pass filter enabled for interrupt 1 source. Default value: 0

(0: filter bypassed; 1: filter enabled)

HPCF1,

HPCF0

High pass filter cut-off frequency configuration. Default value: 00

(00: HPc=8; 01: HPc=16; 10: HPc=32; 11: HPc=64)

Table 23.

High-pass filter mode configuration

HPM1

HPM0

High-pass filter mode

Normal mode (reset reading HP_RESET_FILTER)

Reference signal for filtering

Normal mode (reset reading HP_RESET_FILTER)

Table 24.

High-pass filter cut-off frequency configuration

HPcoeff2,1

ft [Hz]

Data rate = 50 Hz

ft [Hz]

Data rate = 100 Hz

ft [Hz]

Data rate = 400 Hz

0.5

0.25

0.5

0.125

0.25

Table 22.

CTRL_REG2 description (continued)

HPc

------------

–

⎝⎠

⎛⎞

------

⋅

6HPc

⋅

----------------------

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