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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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ST72101 데이터시트(PDF) 30 Page - STMicroelectronics |
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ST72101 데이터시트(HTML) 30 Page - STMicroelectronics |
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30 / 85 page  Obsolete Product(s) - Obsolete Product(s) 30/85 ST72101/ST72212/ST72213 5.2 WATCHDOG TIMER (WDG) 5.2.1 Introduction The Watchdog timer is used to detect the occur- rence of a software fault, usually generated by ex- ternal interference or by unforeseen logical condi- tions, which causes the application program to abandon its normal sequence. The Watchdog cir- cuit generates an MCU reset on expiry of a pro- grammed time period, unless the program refresh- es the counter’s contents before the T6 bit be- comes cleared. 5.2.2 Main Features s Programmable timer (64 increments of 12288 CPU cycles) s Programmable reset s Reset (if watchdog activated) after a HALT instruction or when the T6 bit reaches zero Figure 21. Watchdog Block Diagram RESET WDGA 7-BIT DOWNCOUNTER fCPU T6 T0 CLOCK DIVIDER WATCHDOG CONTROL REGISTER (CR) ÷12288 T1 T2 T3 T4 T5 30 |
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