STR750FV1 datasheet(54/84 Pages) STMICROELECTRONICS

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Electrical parameters

STR750Fxx STR751Fxx STR752Fxx STR755Fxx

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6.3.8

I/O port pin characteristics

General characteristics

Subject to general operating conditions for VDD_IO and TA unless otherwise specified.

Table 32.

General characteristics

I/O static characteristics

Symbol

Parameter

Conditions

Min

Typ

Max Unit

VIL

Input low level voltage

TTL ports

0.8

VIH

Input high level voltage

Vhys

Schmitt trigger voltage

hysteresis(1)

Hysteresis voltage between Schmitt trigger switching levels.

400

IINJ(PIN)

Injected Current on any I/O pin

± 4

ΣI

INJ(PIN

(2)

When the current limitation is not possible, the VIN absolute maximum rating must be respected, otherwise

refer to IINJ(PIN) specification. A positive injection is induced by VIN>VDD_IO while a negative injection is

induced by VIN<VSS. Refer to Section 6.2 on page 32 for more details.

Total injected current (sum of all

I/O and control pins)

± 25

Ilkg

Input leakage current on robust

pins

See Section 6.3.12 on page 72

Input leakage current(3)

Leakage could be higher than max. if negative current is injected on adjacent pins.

VSS≤VIN≤VDD_IO

±1

μA

Static current consumption(4)

Configuration not recommended, all unused pins must be kept at a fixed voltage: using the output mode of

the I/O for example or an external pull-up or pull-down resistor (see Figure 25). Data based on design

simulation and/or technology characteristics, not tested in production.

Floating input mode

200

RPU

Weak pull-up equivalent

resistor(5)

The RPU pull-up and RPD pull-down equivalent resistor are based on a resistive transistor.

VIN=VSS

VDD_IO=3.3 V

200

VDD_IO=5 V

150

RPD

Weak pull-down equivalent

resistor(5)

VIN=VDD_IO

VDD_IO=3.3 V

180

VDD_IO=5 V

120

CIO

I/O pin capacitance

tw(IT)in

External interrupt/wake-up lines

pulse time(6)

To generate an external interrupt, a minimum pulse width has to be applied on an I/O port pin configured

as an external interrupt source.

TAP

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