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PCA9620 데이터시트(PDF) 18 Page - NXP Semiconductors |
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PCA9620 데이터시트(HTML) 18 Page - NXP Semiconductors |
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18 / 71 page ![]() PCA9620 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 1 — 9 December 2010 18 of 71 NXP Semiconductors PCA9620 Universal LCD driver for low multiplex rates 7.3.3 Recommended power-down sequences With the following sequences the PCA9620 can be set to a state of minimum power consumption, called power-down mode. Fig 9. Recommended start-up sequence when using an external supplied VLCD and an external clock signal Wait 1 ms START Initialize command 013aaa252 Write RAM content to be displayed and enable the display STOP Apply external clock signal to pin CLK; set OSC bit logic 1 Power-on VDD1, VDD2, and VLCD at the same time Initiate an OTP-refresh Fig 10. Recommended power-down sequence for minimum power-down current when using the internal charge pump and the internal clock signal Stop genera- tion of VLCD by setting bit CPE logic 0 START Disable dis- play by setting bit E logic 0 Disable tem- perature mea- surement by setting bit TME logic 0 013aaa253 STOP |
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