MPC8535E datasheet(74/126 Pages) FREESCALE

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MPC8535E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 3

Enhanced Secure Digital Host Controller (eSDHC)

Freescale Semiconductor

Figure 42. Local Bus Signals, GPCM/UPM Signals for LCRR[CLKDIV] = 8 or 16(PLL Enabled)

2.13

Enhanced Secure Digital Host Controller (eSDHC)

This section describes the DC and AC electrical specifications for the eSDHC interface of the MPC8535E.

2.13.1

eSDHC DC Electrical Characteristics

Table 55 provides the DC electrical characteristics for the eSDHC interface of the MPC8535E.

Table 55. eSDHC interface DC Electrical Characteristics

At recommended operating conditions (see Table 3)

Characteristic

Symbol

Condition

Min

Max

Unit

Notes

Input high voltage

VIH

—

0.625 * OVDD

OVDD+0.3

—

Input low voltage

VIL

—

–0.3

0.25 * OVDD

—

Input/Output leakage current

IIN/IOZ

—

–10

uA—

Output high voltage

VOH

IOH = -100 uA @OVDDmin 0.75 * OVDD

—

LSYNC_IN

UPM Mode Input Signal:

LUPWAIT

tLBIXKH2

tLBIVKH2

tLBIVKH1

tLBIXKH1

tLBKHOZ1

UPM Mode Output Signals:

GPCM Mode Output Signals:

tLBKHOV1

tLBKHOZ1

Input Signals:

LAD[0:31]/LDP[0:3]

(PLL Bypass Mode)

LCS[0:7]/LWE

LCS[0:7]/LBS[0:3]/LGPL[0:5]

GPCM Mode Input Signal

LGTA

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