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AT89LP51 데이터시트(PDF) 75 Page - ATMEL Corporation

부품명 AT89LP51
상세설명  8-bit Microcontroller with 8K Bytes In-System Programmable Flash
PDF  113 Pages
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제조업체  ATMEL [ATMEL Corporation]
홈페이지  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

AT89LP51 데이터시트(HTML) 75 Page - ATMEL Corporation

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3709B–MICRO–12/10
AT89LP51/52 - Preliminary
16. Instruction Set Summary
The AT89LP51/52 is fully binary compatible with the 8051 instruction set. In Compatibility mode
the AT89LP51/52 has identical execution time with AT89S51/52 and other standard 8051s. The
difference between the AT89LP51/52 in Fast mode and the standard 8051 is the number of
cycles required to execute an instruction. Fast mode instructions may take 1 to 5 clock cycles to
complete. The execution times of most instructions may be computed using Table 16-1. Note
that for the purposes of this table, a clock cycle is one period of the output of the system clock
divider. For Fast mode the divider defaults to 1, so the clock cycle equals the oscillator period.
For Compatibility mode the divider defaults to 2, so the clock cycle is twice the oscillator period,
or conversely the clock count is half the number of oscillator periods.
Table 16-1.
Instruction Execution Times and Exceptions
(1)
Generic Instruction Types
Fast Mode Cycle Count Formula
Most arithmetic, logical, bit and transfer instructions
# bytes
Branches and Calls
# bytes + 1
Single Byte Indirect (i.e. ADD A, @Ri, etc.)
2
RET, RETI
4
MOVC
3
MOVX
4
(3)
MUL
2
DIV
4
INC DPTR
2
Arithmetic
Bytes
Clock Cycles
Hex Code
Compatibility
Fast
ADD A, Rn
1
6
1
28-2F
ADD A, direct
2
6
2
25
ADD A, @Ri
1
6
2
26-27
ADD A, #data
26
2
24
ADDC A, Rn
1
6
1
38-3F
ADDC A, direct
2
6
2
35
ADDC A, @Ri
1
6
2
36-37
ADDC A, #data
26
2
34
SUBB A, Rn
1
6
1
98-9F
SUBB A, direct
2
6
2
95
SUBB A, @Ri
1
6
2
96-97
SUBB A, #data
26
2
94
INC Rn
1
6
1
08-0F
INC direct
2
6
2
05
INC @Ri
1
6
2
06-07
INC A
2
6
2
04
DEC Rn
1
6
1
18-1F
DEC direct
2
6
2
15



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