18. Gain Adjustment Method

(1) AGC Operations

The AGC circuits for LA1136N and LA1137N are configured based on the AGC circuit for LA1135.

Although this explanation is for the LA1137N, it is identical for the LA1136N, except that the pin numbers are different.

1 IF stage

The IF stage block diagram is shown in the figure above. The output current from pin 12 is converted to a voltage and

detected by pin 14 of the IF AGC circuit. IF Amplifier I prevents the input signal from exceeding the dynamic range of IF

Amplifier II. The relationship between the gain and distortion of the IF stage is shown in Figure 1.

Note that when the gain is decreased, the AGC ON level is increased causing distortion at the IF Amplifier II input (At

maximum sensitivity, the antenna input is increased at output –25 dBµ.) This limits the effectiveness of using the IF tank

II for decreasing gain.

2 RF stage

The AGC for signal 1 of LA1137N operates as shown below.

The RF AGC circuit reduces the voltage on pin 1 (6 V when no input) by detecting and amplifying the mixer input signal.

When operating, the voltage drops to 3.5 V, approximately 6 mA of antenna dumping current is driven from Pin 3 to hold the

antenna input signal constant. When current flows from Pin 3, the voltage on Pin 1 drops to 0.6 V min. to control the

drain-to-source voltage of the input FET. Because the RF AGC operates independently of the gain of IF tank I, the RF AGC

gain can be reduced without increasing distortion (See Figure 2).

IF

amplifer

I

IF

amplifier

II

Detector

500 k

Ω VR

HW-60303

IF tank II

gain

attenuator

Set value

Maximum sensitivity, MS – dBµ

Figure 1

AGC gain and distortion characteristics

Mixer coil, no attenuation

Mixer coil, with

attenuation

Ceramic

filter

mismatch

caused by

resistor R

Distortion

Mixer input – dBµ

Figure 2 Gain adjustment

Double-

tuned

circuit

LA1136N, 1136NM, 1137N, 1137NM

No. 3507-23/28