IC-MPEVALMP1D datasheet(13/22 Pages) ICHAUS

13 / 22 page

iC-MP 8-BIT HALL ANGLE ENCODER

WITH RATIOMETRIC OUTPUT

Rev B1, Page 13/22

Figure 13: Serial timing of Write ROM Mode

Figure 13 shows the serial timing of a Write ROM op-

eration (burning the Zener zap diodes). The bit stream

is described in Table 4. Each Zener zap diode can be

programmed once with a logic of ’1’. The default value

of the Zener zap diodes is a logic ’0’ (with the excep-

tion of ZTEST(1:0)). The resulting parameter (OFF-

SET, MODE and ENERR) are generated by an xor op-

eration of the three sets of bits (see Figure 15).

Figure 14: In-circuit programming

A 100 nF ceramic block capacitor must be placed on

the board directly between iC-MP’s VZAP and GND

pins. A 10 µF capacitor must also be present at the

end of the programming line as close to the connec-

tor as possible (see Figure 14). During programming,

up to 90 mA ﬂow from pin VZAP to pin GND, making

it necessary to ensure proper PCB layout to minimize

voltage drops.

Figure 15: ROM construction

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