13892 datasheet(49/156 Pages) FREESCALE

49 / 156 page

Table 13. Additional Sense Bits

MODES[1:0]

00 = MODE grounded

10 = MODE to VCOREDIG

11 = MODE to VCORE

page 41

PUMSxS[1:0]

00 = PUMS grounded

01 = PUMS open

10 = PUMS to VCOREDIG

11 = PUMS to VCORE

page 55

CHRGSSS

0 = Single path

1 = Serial path

page 88

Analog Integrated Circuit Device Data

Freescale Semiconductor

13892

FUNCTIONAL DEVICE OPERATION

I2C INTERFACE

SPECIFIC REGISTERS

IDENTIFICATION

The 13892 parts can be identified though identification bits which are hardwired on chip.

The version of the 13892 can be identified by the ICID[2:0] bits. This is used to distinguish future derivatives or customizations

of the 13892. The bits are set to ICID[2:0] = 111 and are located in the revision register.

The revision of the 13892 is tracked with the revision identification bits REV[4:0]. The bits REV[4:3] track the full mask set

revision, where bits REV[2:0] track the metal revisions. These bits are hardwired.

Table 14. IC Revision Bit Assignment

10001

Pass 3.1

The bits FIN[3:0] are Freescale use only and are not to be explored by the application.

The 13892 die is produced using different wafer fabrication plants. The plants can be identified via the FAB[1:0] bits. These

bits are hardwired.

MEMORY REGISTERS

The 13892 has a small general purpose embedded memory of 2 times 24 bits to store critical data. The data is maintained

when the device is turned off and when in a power cut. The contents are only reset when a RTC reset occurs, see Clock

Generation and Real Time Clock.

Sense

Description

Section

Bits REV[4:0]

IC Revision

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