ZXCD1210

Issue 2 - October 2007

4

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© Zetex Semiconductors plc 2007

Functional description

supplies required by the internal circuitry of the device.

The on chip oscillator produces a clock which is set to approximately 200kHz by an external

capacitor and an on chip resistor. The clock is set at least an order higher in frequency than the

audio input. This clock is a triangle waveform which is used to modulate the incident analogue

signal in order to produce the required PWM output.

With no audio input signal applied, the PWM duty cycle is nominally 50%. As the audio input

signal ascends towards the peak level, the crossing points with the (higher frequency) triangle

wave also ascend. The PWM output exhibits a corresponding increase in output duty cycle.

Similarly, as the audio input signal descends, the duty cycle is correspondingly reduced. Thus the

triangle modulates the audio input generating a pulse width modulated (PWM) output. This

principle is illustrated below.

The PWM outputs drive the speaker load with the audio information contained in the PWM signal,

via the off chip gate drivers, H bridge and single stage LC filter network.

The triangle amplitude is approximately 1V. The audio inputs are internally biased to a DC voltage

triangular wave at the CK pin traverses between about 2.7V and 3.8V.

Audio

Triangle

PWM comparator

PWM output

Audio

Comparator O/P (duty cycle = 50%)

Comparator O/P (duty cycle = 75%)

Triangle

Output

Audio

Triangle

Output

Triangle input

Audio input

PWM output